Well... I'm trying to build a block for a simple numeric. (Calculating die area and reverse-engineering the Hawaii GPU) Many clues drive me to one thesis that a full Hawaii GPU employs 48CU which is equivalent to 3072SP / 192TMU while ROP/memory part remains unchanged. Steps are following: - Start with a Tahiti and Pitcairn die image. Normalize the size of their CU (shader cluster) - Now we earn 6 GDDR5 controllers in Tahiti as well as 4 in Pitcairn, Tahiti's IMC is about 3 times larger than that of Pitcairn. At this point we should remind that Hawaii's 512bit GDDR5 controller is actually 30% smaller than Tahiti's 384bit controller thank to design-wise simplification of 2^n width bus. So it seems very rational that Tahiti has 3 times bigger IMC than that of Pitcairn. - ROP partitions are (literally) covering around the shader clusters. Calculated areas (thank to MS PPT: I drawed infinitely many rectangles, get their vertical/horizontal lengths and manually multiply them) are surprisingly similar among Tahiti and Pitcairn, which suggests that they actually have the same amount of ROPs(both employ 32). - Reverse-engineering is done. We've done almost everything. Etc & Overheads are less than 5% of total area. - Now the "block-building" time. Start with shaders: Simply multiply 44 or 48 to 'normalized' shader cluster size. - Estimate the IMC size of Hawaii. In this case we have two ways to approach: Multiply 0.7 to Tahiti's IMC or 2 to Pitcairn's - Fortunately, both earn the same value. - Estimate the size of ROP partition: I simply multiply 2 to Tahiti's ROP size(which is same as Pitcairn's) because Hawaii have ROPs as twice much as them. - Apply similar ratio for etc & overhead area (= dead space). In this case I apply 5%. - Sum them all! When I apply 44 CUs for Hawaii GPU, I earn 410~415mm2 die size which is quite smaller than its revealed size (438mm2). Interestingly, I could get this number only when I apply the amont of CUs equal to 48, which means AMD's highest SKU as of today (=290X) is being shipped as 'not-fully-capable' status. In other words, a full Hawaii GPU has 3072 SP and 192 TMU at the highest probability. Well, my thread is over. How do you guys think about that?

Its probable what you said. I think AMD are waiting on a die shrink to enable the full scope of the architecture. Both AMD and Nvidia are at a point where a die shrink is needed to keep advancing; heat, power concerns and just fitting any more transistors on future chips needs it.