AVX-512 Is an Intel Gimmick To Win Benchmarks and should die a painful death

Discussion in 'Frontpage news' started by Hilbert Hagedoorn, Jul 13, 2020.

  1. Fox2232

    Fox2232 Ancient Guru

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    As of process sync. Is there really that big cost difference between AVX2 and AVX-512? (I have feeling that you are still comparing x87 vs AVX-512 even after I did multiple times stated that it is existing AVX2 vs AVX-512.)

    And again, I am talking about Average Joe value. Where one should ask if your gaming CPU has to be more expensive due to beefy instructions while providing specific benefit that's rather tiny on average.

    I'll reiterate. Graph is clear. "Relative Power (measured at the wall)". Clearly if power of entire system was just 2% higher, there would be no need for downclock. (But that's why I suggested real world testing, because intel and power figures are not trusted by anyone who experienced them 1st hand while doing measuring.)
    https://www.intel.com/content/dam/w...on-e5-v3-advanced-vector-extensions-paper.pdf
     
  2. DmitryKo

    DmitryKo Master Guru

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    The difference is in the number of active threads - as you increase thread count and data sizes, locking overhead increases disproportionaly, so 3x core/thread count would only result in 2x performance or less. Video encoding benchmarks are a good example.

    They may need to decrease maximum frequency in order to improve stability. Wider data path requires longer transistor chains to connect additional blocks - so to achieve a stable state, you need either faster gates or a lower frequency.

    Turbo frequency is always controlled dynamically based on core temperature and power management profile; this depends on the computation workload and CPU binning.


    Sure, let us know your results when you have one of these server systems.

    Intel 10-series desktop processors are significantly cheaper per core, thanks to competition from AMD.
     
    Last edited: Jul 28, 2020
  3. user1

    user1 Ancient Guru

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    interesting insights from ex-intel engineer on this matter

     
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