Die size matters for both cost and maximum performance. Larger die = more transistors = higher cost. AMD needs to be competitive, so the larger die just ends up eating into their margins. Nvidia jointly with TSMC designed it's own node 12nmFFN for Volta purposely so they can scale up to 800mm2 with GV100. Traditionally the limit is 600mm2. If AMD requires ~480mm2 for 1080 performance they don't have much more room to scale the chip up. 7nm will obviously help this, but it's clear that they are spending a lot more transistors than Nvidia for a similar level of performance. Also the die size number, ~480mm2, is without the HBM2 - just the actual core. That's why there was some initial confusion on the size, as GamersNexu5 and PC Per didn't know exactly where the core ended. Raja stepped in and confirmed the core is 484mm2. AMD plans on side stepping the 600mm2 limit by using an MCM design, similar to Eypc/TR supposedly with Navi. But the timeframe on that is 2019 and who knows if that will hold true or what other penalties an MCM design would incur.